Handling Scc Interrupts; Function Code Registers (Rfcr And Tfcr) - Freescale Semiconductor MPC850 User Manual

21.4.1 Function Code Registers (RFCR and TFCR)

Each SCC has two separate function code registers—one for Rx buffers (RFCRx) and one
for Tx buffers (TFCRx). Function code registers contain the value to appear on AT[1–3]
when the associated SDMA channel accesses memory. It also selects the byte-ordering
convention. Figure 21-8 shows the register format.
Bit 0
Field
Reset
R/W
Addr
Figure 21-8. Function Code Registers (RFCR and TFCR)
Table 21-5 describes RFCRx/TFCRx fields.
Bits Name
0–2 — Reserved, should be cleared.
BO
3–4 Byte ordering. Program BO to select the required byte ordering for the buffer. If BO is changed
on-the-fly, it takes effect at the beginning of the next frame (Ethernet, HDLC, and transparent) or at
the beginning of the next BD. See Appendix A, "Byte Ordering."
00 Reserved
01 PowerPC little-endian.
1x Big-endian or true little-endian.
AT[1–3]
5–7 Address type. Contains the function code value used during the SDMA channel memory access.
Note AT[0] is driven high to identify this SDMA channel access as a DMA type.

21.4.2 Handling SCC Interrupts

SCC interrupts are handled globally by the CPM interrupt controller (CPIC) using the CPM
interrupt pending register (CIPR), CPM interrupt mask register (CIMR), and CPM
in-service register (CISR), described in Chapter 35, "CPM Interrupt Controller." Bits in
each CPIC register are used to mask, enable, or report individual interrupts in an SCC.
Interrupt priority among SCCs is determined in the CPM interrupt configuration register
(CICR).
To allow interrupt handling for SCC-specific events, further event, mask, and status
registers are provided within each SCC's internal memory map area; see Table 21-6. Since
interrupt events are protocol-dependent, event descriptions are found in the specific
protocol chapters.
1 2
—
SCCx base + 0x04 (RFCRx); SCCx base + 0x05 (TFCRx)
Table 21-5. RFCRx /TFCRx Field Descriptions
Chapter 21. Serial Communications Controllers
3 4
BO
0000_0000
R/W
Description
SCC Parameter RAM
5 6
AT[1–3]
7