Powerpc Registers—User Registers; Powerpc User-Level Register Bit Assignments; Condition Register (Cr) - Freescale Semiconductor MPC850 User Manual

MPC850 Register Implementation
4.1.1 PowerPC Registers—User Registers
The MPC850 implements the user-level registers defined by the PowerPC architecture
except those required for supporting floating-point operations (the floating-point register
file (FPRs) and the floating-point status and control register (FPSCR)). User-level,
PowerPC registers are listed in Table 4-1 and Table 4-2. Table 4-2 lists user-level
special-purpose registers (SPRs).
Description Name
General-purpose GPRs
registers
Condition register
Table 4-2 lists SPRs defined by the PowerPC architecture implemented on the MPC850.
SPR Number
SPR
Decimal
[5–9]
1 00000 00001
8 00000 01000
9 00000 01001
268 01000 01100
269 01000 01101
1
Extended opcode for mftb, 371 rather than 339.
2
Any write (mtspr) to this address causes an implementation-dependent software emulation exception.

4.1.1.1 PowerPC User-Level Register Bit Assignments

This section describes bit assignments of PowerPC registers implemented by the MPC850.
For more details, see the Programming Environments Manual for 32-Bit Processors.
4.1.1.1.1 Condition Register (
The condition register (CR) is a 32-bit register that reflects the result of certain operations
and provides a mechanism for testing and branching. The bits in the CR are grouped into
eight 4-bit fields, CR0–CR7, as shown in Figure 4-1.
CR0 CR1
0 3 4
Table 4-1. User-Level PowerPC Registers
Comments
The thirty-two 32-bit (GPRs) are used for
source and destination operands.
CR See Section 4.1.1.1.1, "Condition Register
(CR)."
Table 4-2. User-Level PowerPC SPRs
Name
SPR
[0–4]
XER See Section 4.1.1.1.3,
"XER."
See the Programming
LR
Environments Manual
See the Programming
CTR
Environments Manual
1
TBL read Section 10.9, "The
PowerPC Timebase."
2
TBU read
CR)
CR2 CR3
7 8 11 12
Figure 4-1. Condition Register (CR)
MPC850 Family User's Manual
Comments
Write: Full sync
Read: Sync relative to load/store operations
No
No
Write (as a store)
CR4 CR5
15 16 19 20
Access Level Serialize Access
User —
Only mtcrf
User
Serialize Access
CR6 CR7
23 24 27 28 31