Usb Receive Buffer Descriptor (Rxbd) - Freescale Semiconductor MPC850 User Manual

32.8.1 USB Receive Buffer Descriptor (RxBD)

The CP reports information about each buffer of received data using RxBDs. The CP closes
the current buffer, generates a maskable interrupt, and starts receiving data in the next buffer
when the current buffer is full. Additionally, it closes the buffer on the following conditions:
• End of packet was detected.
• Overrun error occurred.
• Bit stuff violation detected.
Figure 32-14 shows the USB RxBD structure. The first half word of the RxBD contains
status and control bits. The user prepares these bits before starting reception; the CP
updates the status bits after the buffer has been closed. (Note that the user is responsible for
clearing status bits.) The second half word contains the data length, in bytes, that was
received. The third and fourth half words contain the pointer to the receive buffer.
Bit 0 1
E
Offset + 0 —
Offset + 2
Offset + 4
Offset + 6
Figure 32-14. USB Receive Buffer Descriptor (RxBD)
Table 32-13 describes RxBD status and control fields.
Table 32-13. RxBD Status and Control Field Descriptions
Bits Name
E
0 Empty. Should be written by the core before enabling the USB.
0 The buffer is full or reception was aborted due to an error. The core can read or write any fields of
this RxBD. The CP will not use this BD again while the E bit is zero.
1 The buffer is empty or reception is in progress. This RxBD and its associated buffer are owned by
the CP. Once E is set, the core should not write any fields of this RxBD.
1 — Reserved, should be cleared.
W
2 Wrap (final BD in table). Should be written by the core before enabling the USB.
0 This is not the last buffer descriptor in the RxBD table.
1 This is the last buffer descriptor in the RxBD table. After this buffer has been used, the CP will
receive incoming data into the first buffer descriptor in the table (the buffer descriptor pointed to by
RBASE). The number of RxBDs in this table is programmable and is determined only by the W bit
and the overall space constraints of the dual-port RAM.
3 I Interrupt. Should be written by the core before enabling the USB.
0 No interrupt is generated after this buffer has been filled.
1 USBER[RXB] is be set when this buffer has been completely filled by the CP, indicating the need
for the core to process the buffer. The RXB bit can cause an interrupt if it is enabled.
1
4 L Last. Set by the USB controller when the buffer is closed due to detection of end-of-packet condition
on the bus, or as a result of error.
0 This buffer does not contain the last character of the message.
1 This buffer contains the last character of the message.
2 3 4 5
W I
L F
Chapter 32. Universal Serial Bus Controller
6 7 8 9 10
— PID —
Data Length
Rx Buffer Pointer
Description
USB Buffer Descriptor Tables
11 12 13 14
NO AB CR OV
15
—