Usb Parameter Ram - Freescale Semiconductor MPC850 User Manual

Token
SETUP The format of setup transactions is similar to OUT but uses a SETUP rather than an OUT PID. A SETUP
token is recognized only by a control endpoint. When a SETUP token is received, setup reception begins.
The USB controller fetches the next BD associated with the endpoint; if it is empty, the controller starts
transferring the incoming packet to the buffer. When the buffer is full, the USB controller clears RxBD[E]
and generates an interrupt if RxBD[I] = 1. If the incoming packet is larger than the buffer, the USB
controller fetches the next BD and, if it is empty, continues transferring the rest of the packet to this buffer.
The entire data packet including the DATA0 PID is written to the receive buffers. If the packet was received
without CRC or bit stuff errors, an ACK handshake is sent to the host. If an error occurs, no handshake
packet is returned and error status bits are set in the last RxBD associated with this packet.
Start of When an SOF packet is received, the USB controller issues a SOF maskable interrupt and the frame
Frame number entry in the parameter RAM is updated.
(SOF)
Preambl The PRE token signals the hub that a low-speed transaction is about to occur. The PRE token is read only
e by the hub. The USB controller ignores the PRE token function in slave mode. In host mode, the USB
(PRE) controller generates a full-speed PRE token before sending a packet to a low-speed peripheral.

32.6 USB Parameter RAM

The USB controller parameter RAM area, shown in Table 32-3., begins at the USB base
address. Notice that it is similar to the SCC general-purpose parameter RAM. The user
must initialize certain parameter RAM values before the USB controller is enabled. Other
values are initialized by the CP. Once initialized, the parameter RAM values usually do not
need to be accessed; they should be modified only when no USB activity is in progress.
1
Offset Name Width
EP0PTR
0x00 16 bits
EP1PTR
0x02 16 bits
0x04 EP2PTR 16 bits
EP3PTR
0x06 16 bits
RSTATE
0x08 32 bits
2
0x0C RPTR 32 bits
0x10 FRAME_N 16 bits
2
0x12 RBCNT 16 bits
0x14 RTEMP 32 bits
1
Offset from USB base. USB base = IMMR + 0x3C00
2
These parameters need not be accessed in normal operation but may be helpful for debugging.
The format of the endpoint pointer registers (EPnPTR) is shown in Figure 32-4.
Table 32-2. USB Tokens (Continued)
Table 32-3. USB Parameter RAM Memory Map
Endpoint pointer registers 0–3. The endpoint parameter block pointers are index
pointers to each endpoint's parameter block. Parameter blocks can be allocated to
any address divisible by 32 in the dual-port RAM. See Figure 32-4.. The map of the
endpoint parameter block is shown in Table 32-4.
Receive internal state. Reserved for CP use only. Should be cleared before enabling
the USB controller.
Receive internal data pointer. Updated by the SDMA channels to show the next
address in the buffer to be accessed.
Frame number. See Figure 32-5..
Receive internal byte count. A down-count value that is initialized with the MRBLR
value and decremented with every byte written by the SDMA channels.
Receive temp. Reserved for CP use only.
Chapter 32. Universal Serial Bus Controller
Description
Description
USB Parameter RAM