Irda Registers; Infrared Mode Register (Irmode) - Freescale Semiconductor MPC850 User Manual

IrDA Registers

29.4 IrDA Registers
The IrDA facility provides two SCC2 internal memory-mapped registers, IRMODE and
IRSIP, described in the following sections.

29.4.1 Infrared Mode Register (IRMODE)

The infrared mode register (IRMODE), shown in Figure 29-12, controls the infrared
operation mode (low, middle or high speed), the number of preambles, the loop mode, the
full-duplex operation, and the DPLL clock rate.
Bit 0 1 2
Field PA
Reset
R/W
Addr
Figure 29-12. Infrared Mode Register (IRMODE)
Table 29-2 describes IRMODE fields.
Bit Name
0–3 PA Number of preambles. Determines the number of preambles in a high-speed transmitter.
(high-speed mode only).
0000 16 preambles.
0001 1 preamble.
...
1111 15 preambles.
4–5 — Reserved.
6 RXP Rx polarity. Determines the polarity of the received signal.
0 Active high polarity. An active high pulse is decoded as '0'.
1 Active low polarity. An active low pulse is decoded as '0'.
7 TXP Tx polarity. Determines the polarity of the transmitted signal.
0 Active high polarity. An active high pulse is decoded as '0'.
1 Active low polarity. An active low pulse is decoded as '0'.
8–9 DCR IrDA DPLL clock ratio. Determines the clock ratio between the IrDA DPLL clock and the bit rate
clock. Valid only in high-speed mode.
00 12x bit rate clock.
01 Reserved.
1x Reserved.
01 16x bit rate clock.
10 20x bit rate clock.
11 Reserved.
10 FD Full duplex. This bit should be set in loopback mode.
0 Data reception is disabled during a transmission process.
1 Transmission and reception of data in parallel are enabled.
3 4 5 6
— RXP TXP
0000_0000_0000_0000
(IMMR & 0xFFF0000) + 0xA38
Table 29-2. IRMODE Field Descriptions
MPC850 Family User's Manual
7 8 9 10
DCR FD LOOP
R/W
Description
11 12 13 14
— MOD
15
EN