Tlb Reload; Translation Reload Examples - Freescale Semiconductor MPC850 User Manual

TLB Manipulation

8.10.1 TLB Reload

The TLB reload (tablewalk) function is performed in the software with some hardware
assistance. It consists of the following actions:
• Automatic storage of the missed data or instruction EA and default attributes in
MI_EPN or MD_EPN. This value is loaded into the selected entry on a write to
MI_RPN or MD_RPN.
• Automatic updating of the replacement location counter to point to the entry to be
replaced. This value is placed in the index field in MI_CTR and MD_CTR.
• As Figure 8-4 and Figure 8-5 show, the level-one pointer is generated when an
mfspr[M_TWB] is performed by concatenating the level-one table base with the
level-one index.
• The level-two pointer is generated when an mfspr[MD_TWC] is performed by
concatenating the level-two table base (extracted from the level-one table) with the
level-two index.
• The TLB entry is written by loading the tablewalk level-two entry value to Mx_RPN.
• A scratch register, M_TW, is provided in addition to the architecture-defined
SPRG0–SPRG3, so miss code need not corrupt existing GPRs.

8.10.1.1 Translation Reload Examples

The following examples reload a TLB entry using a two-level tree page table structure. In
both examples, M_TWB holds the base pointer to the first-level table and data and
instruction address translation are turned off. Figure 8-23 performs a DTLB reload.
dtlb_swtw mtspr M_TW, R1
mfspr R1, M_TWB
lwz
mtspr MD_TWC,R1
mfspr R1, MD_TWC # Load R1 with level-2 pointer while taking page
lwz
mtspr MD_RPN, R1 # Write TLB entry
mfspr R1, M_TW
rfi
# Save R1
# Load R1 with level-1 pointer
R1, (R1) # Load level-1 page entry
# Save level-2 base pointer and level-1 attributes
# size into account
R1, (R1) # Load level-2 page entry
# Restore R1
Figure 8-23. DTLB Reload Code Example
MPC850 Family User's Manual