Reserved Instruction Class; Addressing Modes; Memory Addressing - Freescale Semiconductor MPC850 User Manual

The following primary opcodes have unused extended opcodes.
17, 19, 31, 59, 63 (primary opcodes 30 and 62 are illegal for all 32-bit
implementations, but as 64-bit opcodes they have some unused extended opcodes)
• An instruction consisting entirely of zeros is guaranteed to be an illegal instruction.
This increases the probability that an attempt to execute data or uninitialized
memory invokes the system illegal instruction error handler (a program exception).
Note that if only the primary opcode consists of all zeros, the instruction is
considered a reserved instruction. This is further described in Section 5.2.1.4,

"Reserved Instruction Class."

An attempt to execute an illegal instruction invokes the illegal instruction error handler (a
program exception) but has no other effect. See Section 6.1.2.7, "Program Exception
(0x00700)," for additional information about illegal and invalid instruction exceptions.
With the exception of the instruction consisting entirely of binary zeros, the illegal
instructions are available for further additions to the PowerPC architecture.
5.2.1.4 Reserved Instruction Class
Reserved instructions are allocated to specific implementation-dependent purposes not
defined by the PowerPC architecture. An attempt to execute an unimplemented reserved
instruction invokes the illegal instruction error handler (a program exception). See
Section 6.1.2.7, "Program Exception (0x00700)," for additional information about illegal
and invalid instruction exceptions.
The following types of instructions are included in this class:
• Implementation-specific instructions
• Optional instructions defined by the PowerPC architecture but not implemented by
the MPC850 (for example, Floating Square Root (fsqrt) and Floating Square Root
Single (fsqrts) instructions)

5.2.2 Addressing Modes

This section provides an overview of conventions for addressing memory and for
calculating effective addresses as defined by the PowerPC architecture for 32-bit
implementations. For more detailed information, see "Conventions," in Chapter 4,
"Addressing Modes and Instruction Set Summary," of The Programming Environments
Manual.

5.2.2.1 Memory Addressing

A program references memory using the effective (logical) address computed by the
processor when it executes a memory access or branch instruction or when it fetches the
next sequential instruction.
Chapter 5. MPC850 Instruction Set
Instruction Set Summary