Features - Freescale Semiconductor MPC850 User Manual

Features

3.3 Features
Figure 3-1 shows the basic features of the MPC850.
Completion
Queue
CQ5
CQ4
CQ3
CQ2
CQ1
CQ0
One Instruction Retired
per Clock
Additional Features
• Power Dissipation Control
• Time Base Counter
• Decrementer
• JTAG
• BDM interface
• Clock Multiplier
Sequential
Fetcher
32-Bit
Instruction
Queue
IQ3
IQ2
IQ1
IQ0
32-Bit (One Instruction)
32-Bit
Integer
Unit
+
⁄
*
XER
ALU
Performs
EA
Calculation
Data
MMU
8 Entry
DTLB
Tags
U-Bus Interface
Figure 3-1. Block Diagram of the Core
MPC850 Family User's Manual
32-Bit (One Instruction)
32-Bit
Branch
Processing Unit
CTR
CR
LR
INSTRUCTION UNIT
32-Bit
GPR File
(32-Entry)
L-Bus
• •
•
32-Bit
32-Bit
1 Kbyte
D-Cache
Load/Store
Unit (LSU)
Instruction
MMU
8 Entry
ITLB
2 Kbyte
Tags
I-Cache