Pcmcia Cycle Control Signals - Freescale Semiconductor MPC850 User Manual

16.2.1 PCMCIA Cycle Control Signals

Table 16-1 describes PCMCIA cycle control signals.
Signal
A[6–31] Address bus. Output. A[6–31] should be buffered to generate the socket signals A[25–0]. These address
bus output lines allow direct addressing of 64 Mbytes of memory on the PCMCIA card. A6 is the msb.
REG Attribute memory select. Output. When REG is asserted during a PCMCIA access, card access is limited to
attribute memory when a memory access occurs (WE or OE are asserted) and to I/O ports when an I/O
access occurs (IORD or IOWR are asserted). If REG is asserted, accesses to common memory or DMA
devices are blocked. When no PCMCIA access is performed, this signal is TSIZ0.
CE1_B, Card enable. Output. When a PCMCIA access is performed, CE1 enables even bytes; CE2 enables odd
CE2_B bytes, as shown below. To access devices supporting IDE/ATA protocols, CEx can be configured in the
PCMCIA option registers (PORx[PRS] = 0b110) to duplicate A[22–23]. At the end of the PCMCIA access
CEx are always negated.
A2
PRS
2
≠ x
110
= 0
110
0
1
1
D[0–15] Data bus. Bidirectional. D[0–15] constitute the bidirectional data bus. The msb is D0 and the lsb is D15.
WAIT_B Extend bus cycle. Input. Asserted by the PC card to delay completion of the pending memory or I/O cycle.
RD/WR External transceiver direction. Output. Asserted during MPC850 read cycles and negated during write
cycles. Used in the PCMCIA interface to control the direction of the data bus transceivers.
IORD_B I/O read. Output. During PCMCIA accesses, this signal is asserted together with REG_B and is used to
read data from the PC card I/O space. IORD_B is valid only when the REG_B and at least one of the
CE1_B and CE2_B signals is also asserted.
IOWR_B I/O write. Output. Asserted with REG_B during PCMCIA accesses used to latch data into the PC card I/O
space. Valid only when REGB and either or both CE1_B and CE2_B signals are also asserted.
OE_B Output enable. Output. During PCMCIA accesses, OE_B is used to drive memory read data from a PC card
in a PCMCIA socket.
WE_B Write enable/program. Output. During PCMCIA accesses, WE_B is used to latch memory write data to the
PC card in a PCMCIA socket. Can also be used as the programming strobe for PC cards using
programmable memory technologies.
Table 16-1. PCMCIA Cycle Control Signals
A2
Port Size Access Size
3
x 8 bits 16-bit (even only)
8-bit odd
8-bit even
16 bits 16-bit (even only)
8-bit odd
8-bit even
No access
0 x x
1 x x
0 x x
1 x x
Chapter 16. PCMCIA Interface
PCMCIA Module Signal Definitions
Description
MPC850: A31 (Slot: A0)
0
1
0
0
1
0
X
x
x
x
x
CE2 CE1
1 0
1 0
1 0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1