Power Control; Reset And Three-State Control - Freescale Semiconductor MPC850 User Manual

Operation Description

16.3.4 Power Control

The user can perform a write cycle using one of the memory controller chip-select pins.
This data includes the controls to the analog switch such as the MAXIM MAX780.
However, no auto-power control is supported.

16.3.5 Reset and Three-State Control

The user can reset the PCMCIA cards or disable the output of the external latches by
writing to PGCRB[CBRESET] and PGCRB[CBOE], respectively.
16.3.6 DMA
The MPC850 DMA module with the CPM microcode provides two independent DMA
(IDMA) channels. See Section 19.3, "IDMA Emulation." The PCMCIA module can be
programmed to generate control for an I/O device implemented as a PCMCIA card to
respond to DMA transfer. Any window can be programmed as a DMA window through
PORx[PRS]. When configured appropriately, the PCMCIA controller supplies the required
signals to the socket. Note that DMA to and from the PCMCIA interface is handled through
dual-access DMA transfers.
DMA requests can be supplied through SPKR_B, IOIS16_B, or INPACK. To support
DMA, INPACK should be connected to DREQ1 for slot B. The source for a DMA request
is programmed through PGCRB[CBDREQ]. If the internal DMA request is disabled, the
DMA request is assumed to be DREQ1 and port C should assign PC14 as DREQ1. If the
request is enabled, port C should not be programmed to be DREQ1.
IOIS16_B SPKR_B
CBDREQ0 DREQ1
Multiplexer Port C Logic
CBDREQ1
PortC DREQ1
Internal DMA Request
Figure 16-2. Internal DMA Request Logic
Chapter 16. PCMCIA Interface