The Spi As A Master Device - Freescale Semiconductor MPC850 User Manual

• When the SPI is a master, SPICLK is the clock output signal that shifts received data
in from SPIMISO and transmitted data out to SPIMOSI. SPI masters must output a
slave select signal to enable SPI slave devices by using a separate general-purpose
I/O signal. Assertion of an SPI's SPISEL, while it is in master mode, causes an error.
• When the SPI is a slave, SPICLK is the clock input that shifts received data in from
SPIMOSI and transmitted data out through SPIMISO. SPISEL is the enable input to
the SPI slave.
• In a multimaster environment, SPISEL (always an input) is also used to detect when
more than one master is operating, which is an error condition.
As described in Chapter 34, "Parallel I/O Ports," SPIMISO, SPIMOSI, SPICLK, and
SPISEL are multiplexed with port B[28–31] signals, respectively. They are configured as
SPI signals through the port B signal assignment register (PBPAR) and the Port B data
direction register (PBDIR), specifically by setting PBPAR[DDn] and PBDIR[DRn].
31.3 Configuring the SPI Controller
The SPI can be programmed to work in a single- or multiple-master environment. This
section describes SPI master and slave operation in a single-master configuration and then
discusses the multi-master environment.
SPI transmission and reception will always be enabled simultaneously. If the transmit or
receive function is not needed, the user can point the associated channel of a non-ready
TxBD or RxBD, and simply ignore the resultant Tx underrun or Rx busy errors.

31.3.1 The SPI as a Master Device

In master mode, the SPI sends a message to the slave peripheral, which sends back a
simultaneous reply. A single master MPC850 with multiple slaves can use general-purpose
parallel I/O signals to selectively enable slaves, as shown in Figure 31-2. To eliminate the
multimaster error in a single-master environment, the master's SPISEL input can be forced
inactive by selecting port B[31] for general-purpose I/O (PBPAR[DD31] = 0).
Chapter 31. Serial Peripheral Interface (SPI)
Configuring the SPI Controller