Phy Transmit Queues; Apc Priority Levels - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
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PHY Transmit Queues

40.6 PHY Transmit Queues
The APC schedules up to NCITS channels in a time slot. It writes each channel number into
a dedicated PHY transmit queue in the position indicated by TQAPTR. The transmitter's
pointer TQTPTR, lagging behind the APC pointer, is used to read channel numbers. For
each channel number read, the transmitter sends a single cell. The channels waiting to be
sent lie between TQTPTR and TQAPTR. Figure 40-5 shows the organization of a PHY
transmit queue.
A transmit queue never overflows because the TQAPTR pointer never wraps to point to the
TQTPTR pointer. If the transmit queue is full, the APC does not insert more channels, and
the APCT_SPTR stalls until space is available in the transmit queue. The depth of the
transmit queue is equal to the number of entries minus 1.

40.7 APC Priority Levels

Table 40-1 describes the memory location and size of the user configurable parameters of
the ATM pace controller.
Offset
0x00
APCT_BASE1
APCT_END1
0x02
APCT_PTR1
0x04
APCT_SPTR1
0x06
0x08–0x0F
APC_MI
0x10
NCITS
0x12
TQBASE
TQTPTR
Scheduled channels
TQAPTR
TQEND
Half word
Figure 40-5. PHY Transmit Queue
Table 40-1. APC Priority Levels
Name
Width
Half Word
Half Word
Half Word
Half Word
Half Word
Half Word
MPC850 Family User's Manual
Description
APC scheduling table—First
priority base pointer. See
Table 40-2..
First APC scheduling
table—Length. See Table 40-2..
First APC scheduling table pointer.
See Table 40-2..
APC scheduling table first priority
service pointer. See Table 40-2..
Reserved
APC—Max iteration
Number of cells in time slot. See
Table 40-2.
User Writes
User defined
User defined
APCT_BASE1 value
APCT_BASE1 value
-
User defined
User defined

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