Atm Pace Control (Apc); Internal And External Channels (Extended Channel Mode) - Freescale Semiconductor MPC850 User Manual

ATM Pace Control (APC)

36.8 ATM Pace Control (APC)
The ATM pace controller determines the next channel (or n channels) to be transmitted and
writes the channel number of these channels in the transmit queue every APC slot time. The
transmitter sends one cell for each channel entry in the transmit queue.
Controlled by the communications processor (CP), the APC provides traffic shaping. Thus,
the APC can flexibly combine SAR traffic with PTP traffic (cell switching). Its pace
controller is based on multiple-level circular tables (APC scheduling tables) in the dual-port
RAM that are used to schedule transmission of all the active channels.
The operation of the APC is controlled by several input parameters programmed by the
user. Scheduling of traffic is controlled through the APC scheduling table length, the
number of cells to be selected in an APC slot time, and the APC request timer. The period
of the APC request timer determines the length of an APC slot time. The APC uses the
APC_period parameter in the TCT to schedule the channel in the APC scheduling table.
For ABR transmission, the host adjusts the APC parameters in response to incoming
resource management (RM) cells and defines the ABR available cell rate (ACR). The APC
period can be changed on-the-fly, thereby allowing the bit rate for a channel to be changed
dynamically, which is necessary to control transmission of traffic types such as ABR. For
ABR, it is the user's responsibility to evaluate RM cells and update the APC_period entry
in the TCT.
The APC input parameters are described in Chapter 40, "ATM Pace Control." These
parameters define the minimum and maximum cell rate and cell delay variation.
36.9 Internal and External Channels (Extended
Channel Mode)
Internal channels are the channels numbered 0 through 31; external channels have channel
numbers greater than 31. The external channels become available only when the user
selects extended channel mode (see Section 38.2, "SAR Receive State Register
(SRSTATE)").
The TCTs and RCTs for internal channels are directly accessed in the (internal) dual-port
RAM. For external channels, the TCT and RCT structures are placed in external memory
and thus require DMA accesses to read and update. Also, the GFC/VPI/VCI/PTI mapping
for external channels requires a CAM or address compression method instead of the
generally faster dual-port RAM look-up table method used for internal channels. Therefore,
the bit rate supported in extended channel mode is reduced. The overall throughput depends
on the number of external channels and the bit rate ratio between external and internal
channels; that is, higher bit rate channels should be assigned internal channel numbers.
MPC850 Family User's Manual