Data-Handling Methods: Character- Or Message-Based - Freescale Semiconductor MPC850 User Manual

Table 22-1. UART-Specific SCC Parameter RAM Memory Map (Continued)
0x50 CHARACTER1
CHARACTER2
0x52
CHARACTER3
0x54
CHARACTER4
0x56
0x58 CHARACTER5
CHARACTER6
0x5A
CHARACTER7
0x5C
0x5E CHARACTER8
RCCM
0x60
0x62 RCCR
0x64 RLBC
1
From SCC base. SCC base = IMMR + 0x3D00 (SCC2) or 0x3E00 (SCC3)
22.5 Data-Handling Methods: Character- or
Message-Based
An SCC UART controller uses the same BD table and buffer structures as the other
protocols and supports both multibuffer, message-based and single-buffer, character-based
operation.
For character-based transfers, each character is sent with stop bits and parity and received
into separate 1-byte buffers. A maskable interrupt is generated when each buffer is received.
In a message-based environment, transfers can be made on entire messages rather than on
individual characters. To simplify programming and save processor overhead, a message is
transferred as a linked list of buffers without core intervention. For example, before
handling input data, a terminal driver may wait for an end-of-line character or an idle
timeout rather than be interrupted when each character is received. Conversely, ASCII files
can be sent as messages ending with an end-of-line character.
When receiving messages, up to eight control characters can be configured to mark the end
of a message or generate a maskable interrupt without being stored in the buffer. This option
is useful when flow control characters such as XON or XOFF are needed but are not part
of the received message. See Section 22.9, "Receiving Control Characters."

Data-Handling Methods: Character- or Message-Based

Hword Control character 1–8. These characters define the Rx control characters on
which interrupts can be generated.
Hword
Hword
Hword
Hword
Hword
Hword
Hword
Hword Receive control character mask. Used to mask comparison of
CHARACTER1–8 so classes of control characters can be defined. A one
enables the comparison, and a zero masks it.
Hword Receive control character register. Used to hold the last rejected control
character (not written to the Rx buffer). Generates a maskable interrupt. If the
core does not process the interrupt and read RCCR before a new control
character arrives, the previous control character is overwritten.
Hword Receive last break character. Used in synchronous UART when PSMR[RZS] =
1; holds the last break character pattern. By counting zeros in RLBC, the core
can measure break length to a one-bit resolution. Read RLBC by counting the
zeros written from bit 0 to where the first one was written. RLBC =
0b001xxxxxxxxxxxxx indicates two zeros; 0b1xxxxxxxxxxxxxxx indicates no
zeros.
Note that RLBC can be used in combination with BRKLN above to measure the
break length down to a bit resolution: (BRKLN + number of zeros in RLBC).
Chapter 22. SCC UART Mode