Auto-Buffering And Buffer-Chaining; Idma Cp Commands - Freescale Semiconductor MPC850 User Manual

IDMA Emulation

19.3.4.2 Auto-Buffering and Buffer-Chaining

Buffer-chaining is designed to move large amounts of noncontiguous blocks of data. Even
though each block needs a separate BD, the BDs can be chained together and serviced as a
group. Auto-buffering is used to repeatedly service a BD chain. Note that a chain can range
from one BD to the whole BD table in length.
Setting the CM bit (continuous mode) in a BD's status-and-control field enables
auto-buffering; clearing the CM bit enables buffer-chaining (normal mode). The CM bit
must be explicitly programmed for each BD.
When auto-buffering, the descriptor's V bit will not be cleared after CPM processing—the
BD remains valid for immediate transfer as the current BD pointer cycles through the table.
When buffer-chaining, the CPM invalidates the current BD after processing to allow the
user (the core) to safely manipulate the contents of the buffer and modify its BD. Note that
the V bit behavior
buffer-chaining—auto-buffering can be thought of as continuous buffer-chaining. One use
of auto-buffering is for continuous monitoring of an external instrument, such as an A/D
converter.
Set the L bit (last) in the status-and-control field to mark the last BD of a chain. When the
CPM completes a chain, it flags IDSR[DONE], triggering a maskable interrupt to the core.
The I bit (individual BD interrupt) behavior is independent of the L bit—the user may
disable individual BD interrupts (and/or mask them) for multi-buffer chains.

19.3.5 IDMA CP Commands

The core issues the following IDMA commands to the CP:
• —The CPM resets the IDMA internal state. The current BD pointer is
INIT IDMA
reset to the top of the BD table (IBASE).
• —The CP terminates current IDMA transfers. IDSR[DONE] is set, and
STOP IDMA
the current BD is closed. If the destination is memory, the IDMA internal storage
buffer is transferred before termination, regardless of the source. If the destination
is a peripheral, the internal storage buffer is flushed and the transfer terminated
without writing to the peripheral. At the next request, the next BD in the table is
processed.
See Section , "The PowerPC core can issue commands to control communications via the
CP command register (CPCR), shown in Figure 18-4. The CP commands handle special
cases, such as initializing or stopping a channel, and are protocol-dependent.," for the
mechanics of issuing CP commands.
is the only difference
MPC850 Family User's Manual
between auto-buffering and