Utopia Interface Transfer Timing - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
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UTOPIA Interface Transfer Timing

UTPClk
RxCav
RxEnb
UTPB
SOC
HREQ
PHY#
PHSEL
Figure 43-7. UTOPIA Receiver Multi-PHY Example
UTPClk
TxCav
TxEnb
UTPB
SOC
PHSEL
Figure 43-8. UTOPIA Transmitter Multi-PHY Example
43.4 UTOPIA Interface Transfer Timing
Table 43-2 describes the UTOPIA interface timing for data transfers and receive and
transmit transitions.
PHY#
H1
PHY#
MPC850 Family User's Manual
H2
H3
H4
H1
H2
H3
UDF

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