Port C Special Options Register (Pcso) - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
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Table 34-14 describes PCPAR bits.
Bits
Name
0–3
Reserved.
4–15
DDn
Configures a signal for general-purpose I/O or for dedicated peripheral function
0 General-purpose I/O. The peripheral functions of the signal are not used.
1 Dedicated peripheral function. The signal is used by the internal module. The on-chip
peripheral function to which it is dedicated can be determined by other bits.

34.4.1.4 Port C Special Options Register (PCSO)

The port C special options (PCSO) register, shown in Figure 34-14, further configures the
corresponding port C signals, including the USB receive signals.
Bit
0
1
2
Field
Reset
R/W
Addr
Figure 34-14. Port C Special Options Register (PCSO)
Table 34-15 describes PCSO bits.
Bits
Name
0–3,
Reserved, should be cleared.
6, 7
4, 8
CDx
Carrier detect
0 PCx is a general-purpose interrupt I/O signal. The SCC internal CDx signal is always asserted. If
PCDIR configures CDx as an input, it can generate an interrupt to the core, as controlled by the
PCINT bits.
1 PCx is connected to the corresponding SCC input as well as being a general-purpose interrupt
signal.
5, 9
CTSx
Clear to send
0 PCx is a general-purpose interrupt I/O signal. The SCC internal CTSx signal is always asserted. If
PCDIR configures this signal as an input, the signal can generate an interrupt to the core, as
controlled by the PCINT bits.
1 PCx is connected to the corresponding SCC input as well as being a general-purpose interrupt
signal.
10
RXN
USBRXN data signal
0 PCx is a general-purpose interrupt I/O signal. If PCDIR configures this signal as an input, the
signal can generate an interrupt to the core, as controlled by the PCINT bits.
1 PCx is the USBRXN data signal.
11
RXP
USBRXP data signal
0 PCx is a general-purpose interrupt I/O signal. If PCDIR configures this signal as an input, the
signal can generate an interrupt to the core, as controlled by the PCINT bits.
1 PCx is the USBRXP data signal.
Table 34-14. PCPAR Bit Descriptions
3
4
5
6
CD3 CTS3
Table 34-15. PCSO Bit Descriptions
Chapter 34. Parallel I/O Ports
Description
7
8
9
10
—CD
CTS2
RXN
2
0
R/W
0x964
Description
11
12
13
14
RXP
DREQ1 DREQ0
Port C
15

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