Watchdog Counter & Wcntr Register; Watchdog Modulus Register (Wmr) - Freescale Semiconductor DSP56374 User Manual

The WCR is reset by a hardware reset only and the reset value is $00000F. The WCR can be updated in the DEBUG mode and it retains the
changed value after the DEBUG mode. If WCR has not been written before entering the DEBUG, then writing in DEBUG mode does not
affect the WCR capability to be written once in normal mode. When DEBUG mod is exited, timer operation continues from the state it was
in before entering debug mode, but any updates made in debug mode remain. If a write-once register is written for the first time in debug
mode, the register is still writable when debug mode is exited.
Changing the Debug bit from 1 to 0 during debug mode starts the watchdog timer. Changing the
DEBUG bit from 0 to 1 during debug mode stops the watchdog timer.
10.4.2 Watchdog Counter & WCNTR Register
The Watchdog Count Register (WCNTR) is a read-only register. Writing to WCNTR has not effect. The WCNTR Register is located at
Y:$FFFFC2.
11
WC11
23
The WCNTR reflects the current value of the counter. The counter is 16-bit down-counter with reset value $FFFF.
1. Reset of counter - The counter is reset asynchronously by a hardware reset.
Reset value = $FFFF.
2. Load of counter - The counter is synchronously loaded from WMR. A 16-bit load occurs if the watchdog is serviced. On a write to
WMR, the corresponding value is updated in the counter.
3. Down counting - The 16-bit counter is decremented every Fosc/4096 clock cycles. When the counter value changes from $0000 to
$FFFF, the WDT pin is asserted which can only be cleared by hardware reset.
10.4.3

Watchdog Modulus Register (WMR)

The WMR is a 16-bit read/write register. This is a write-once register.The WMR Register is located at Y:$FFFFC1.
11
WM11
23
The WMR register contains the modulus value that is reloaded into the watchdog counter by a service sequence. Once written, the WMR is
not affected by further writes except in debug mode. The WMR can be written in DEBUG mode even if written-once earlier and it retains the
changed value on exiting the DEBUG mode. If WMR has not been written before entering the DEBUG mode, writing in DEBUG mode does
not affect the WMR capability to be written once in normal mode.
Writing to WMR immediately loads the new modulus value into the watchdog counter. The new value is also used at all subsequent reloads.
Reading the WMR register returns the value in the modulus register.
Freescale Semiconductor
NOTE
10 9 8 7
WC10 WC9 WC8 WC7
22 21 20 19
Reserved bit - read as zero; should be written with zero for future compatibility.
Figure 10-3. WCNTR Register
10 9 8 7
WM10 WM9 WM8 WM7
22 21 20 19
Reserved bit - read as zero; should be written with zero for future compatibility.
Figure 10-4. WMR Register
DSP56374 Users Guide, Rev. 1.2
6 5 4 3
WC6 WC5 WC4 WC3
18 17 16 15
WC15
6 5 4 3
WM6 WM5 WM4 WM3
18 17 16 15
WM15
Description of Registers
2 1 0
WC2 WC1 WC0
14 13 12
WC14 WC13 WC12
2 1 0
WM2 WM1 WM0
14 13 12
WM14 WM13 WM12
10-3