Instruction Reordering Within An Execution Set - Freescale Semiconductor SC140 DSP Core Reference Manual

Instruction Grouping

5.2.5 Instruction Reordering Within an Execution Set

The SC140 can execute up to four DALU instructions and up to two AGU instructions concurrently. These
instructions are grouped together in an execution set and dispatched in parallel to the execution units by the
PDU. Since the execution units of each type are identical (in principle), any ALU can receive any DALU
instruction. As well, any AAU can receive any AGU instruction. The hardware takes advantage of this fact
to reduce internal routing from the PDU to the execution units. As a result of this reduction, some
reordering may be necessary concerning instruction positions within an execution set.
In general, execution set reordering is transparent to application developers. The assembler appropriately
reorders the instruction encoding in an execution set. However, the assembler's behavior may become
apparent upon disassembly of the binary code when the order of instructions in the set may be different
from the source code. In some rare cases, the assembler may add a NOP instruction in order to accomplish
the reordering.
An execution set can include up to eight instruction words, occupying positions 0 through 7 within the set.
The position of a multi-word instruction is defined as the position of its first word. Example 5-3 shows the
positions occupied by 3 one-word (1w) instructions and 2 two-word (2w) instructions grouped with a
one-word prefix:
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