Smart Card Mode Register (Scmr) - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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13.3.8

Smart Card Mode Register (SCMR)

SCMR selects LSB-first or MSB-first by means of bit SDIR. In this LSI, smart card interface
mode cannot be specified.
Bit
Bit Name Initial Value
7 to 4 —
1
3
DIR
0
2
INV
0
1
1
0
0
Rev. 3.0, 10/02, page 370 of 686
R/W
Description
Reserved
These bits are always read as 1.
R/W
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: LSB-first in transfer
1: MSB-first in transfer
The bit setting is valid only when the transfer data format
is 8 bits.
R/W
Smart Card Data Invert
Specifies inversion of the data logic level. The SINV bit
does not affect the logic level of the parity bit. To invert
the parity bit, invert the O/E bit in SMR.
0: TDR contents are transmitted as they are. Receive
data is stored as it is in RDR
1: TDR contents are inverted before being
transmitted. Receive data is stored in inverted form
in RDR
Reserved
This bit is always read as 1.
R/W
Reserved
This bit is always read as 1.

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