Real-Time Clock Control Register 2 (Rtccr2) - Renesas M16C/64A Series User Manual

M16C/64A Group
20.2.6

Real-Time Clock Control Register 2 (RTCCR2)

Real-Time Clock Control Register 2
b7 b6 b5 b4 b3 b2 b1
Write to the RTCCR2 register when bits TSTART and TCSTF in the RTCCR1 register are both 0 (count
stopped).
While bits RTCCMP1 to RTCCMP0 are 00b (no compare mode), an interrupt request can be generated
every second, minute, hour, day, or week. To generate an interrupt request, set one of the following bits
to 1 (interrupt enabled): SEIE, MNIE, HRIE, DAYIE, or WKIE. (Do not set more than one bit to 1.) Table
20.4 lists Periodic Interrupt Sources.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
Symbol
b0
RTCCR2
Bit Symbol Bit Name
Periodic interrupt triggered
SEIE
every second enable bit
Periodic interrupt triggered
MNIE
every minute enable bit
Periodic interrupt triggered
HRIE
every hour enable bit
Periodic interrupt triggered
DYIE
every day enable bit
Periodic interrupt triggered
WKIE
every week enable bit
RTCCMP0
Compare mode select bit
RTCCMP1
—
No register bit. If necessary, set to 0. The read value is undefined.
(b7)
Address
0345h
Function
0 : Disable periodic interrupt triggered
every second
1 : Enable periodic interrupt triggered
every second
0 : Disable periodic interrupt triggered
every minute
1 : Enable periodic interrupt triggered
every minute
0 : Disable periodic interrupt triggered
every hour
1 : Enable periodic interrupt triggered
every hour
0 : Disable periodic interrupt triggered
every day
1 : Enable periodic interrupt triggered
every day
0 : Disable periodic interrupt triggered
every week
1 : Enable periodic interrupt triggered
every week
b6 b5
0 0 : No compare mode
0 1 : Compare mode 1
1 0 : Compare mode 2
1 1 : Compare mode 3
20. Real-Time Clock
Reset Value
X000 0000b
RW
RW
RW
RW
RW
RW
RW
RW
—
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