Real-Time Clock Minute Compare Data Register (Rtccmin) - Renesas M16C/64A Series User Manual

M16C/64A Group
20.2.9

Real-Time Clock Minute Compare Data Register (RTCCMIN)

Real-Time Clock Minute Compare Data Register
b7 b6 b5 b4 b3 b2 b1
The RTCCMIN register is enabled when bits RTCCMP1 to RTCCMP0 in the RTCCR2 register are 01b,
10b, or 11b (any compare mode).
MCMP03 to MCMP00 (First digit of minute compare data bit) (b3-b0)
MCMP12 to MCMP10 (Second digit of minute compare data bit) (b6-b4)
Set a value between 00 and 59 by the BCD code.
Write to these bits when the BSY bit in the RTCSEC register is 0 (not while data is updated).
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
Symbol
b0
RTCCMIN
Bit Symbol
MCMP00
MCMP01
First digit of minute compare data bit
MCMP02
MCMP03
MCMP10
MCMP11 Second digit of minute compare data bit Store compare data
MCMP12
—
No register bit. If necessary, set to 0. The read value is undefined.
(b7)
Address
0349h
Bit Name
Store compare data
20. Real-Time Clock
Reset Value
X000 0000b
Setting
Function RW
Range
RW
RW
0 to 9
RW
RW
RW
0 to 5 RW
RW
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