Renesas M16C/64A Series User Manual page 321

M16C/64A Group
Pulse Width Modulation (PWM) Mode
Timer Ai Mode Register (i = 0 to 4)
b7 b6 b5 b4 b3 b2 b1
1
MR1 (External trigger select bit) (b3)
This bit is enabled when the MR2 bit is 1, and bits TAiTGH to TAiTGL in the ONSF register or TRGSR
register are set to 00b (TAiIN pin input).
TCK1 and TCK0 (Count source select bit) (b7-b6)
These bits are enabled when the TCS3 bit or TCS7 bit in registers TACS0 to TACS2 is set to 0 (TCK0
to TCK1 enabled).
Set the PCLK0 bit in the PCLKR register to select f1TIMAB or f2TIMAB.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
b0 Symbol
1
TA0MR to TA4MR
Bit Symbol Bit Name
TMOD0
Operation mode select bit
TMOD1
Pulse output function
MR0
select bit
External trigger select
MR1
bit
MR2 Trigger select bit
16-/8-bit PWM mode
MR3
select bit
TCK0
Count source select bit
TCK1
Address
0336h to 033Ah
Function
b1 b0
1 1 : PWM mode
or programmable output mode
0 : No pulse output
(TAiOUT pin functions as I/O port)
1 : Pulse output
(TAiOUT pin functions as a pulse output
pin)
0 : Falling edge of input signal to TAiIN pin
1 : Rising edge of input signal to TAiIN pin
0 : Write 1 to the TAiS bit in the TABSR register
1 : Selected by bits TAiTGH to TAiTGL
0 : 16-bit PWM mode
1 : 8-bit PWM mode
b7 b6
0 0 : f1TIMAB or f2TIMAB
0 1 : f8TIMAB
1 0 : f32TIMAB
1 1 : fC32
17. Timer A
Reset Value
00h
RW
RW
RW
RW
RW
RW
RW
RW
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