Nmi Interrupt; 14.10 Key Input Interrupt - Renesas M16C/64A Series User Manual

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M16C/64A Group

NMI Interrupt

14.9
An NMI interrupt is generated when input to the NMI pin changes state from high to low. The NMI interrupt
is a non-maskable interrupt. To use the NMI interrupt, set the PM24 bit in the PM2 register to 1 ( NMI
interrupt enabled). The NMI input uses the digital filter. Refer to 13. "Programmable I/O Ports" for the
digital filter. Figure 14.10 shows NMI Interrupt Block Diagram.
NMI
NMIDF2 to NMIDF0 : Bits in the NMIDF register
PM24
Figure 14.10 NMI Interrupt Block Diagram

14.10 Key Input Interrupt

If the PCR7 bit in the PCR register is 0 ( KI0 to KI3 key input enabled), when input to any pin from P10_4
to P10_7 becomes low where the corresponding PD10_4 to PD10_7 bit in the PD10 register is 0 (input),
the IR bit in the KUPIC register becomes 1 (key input interrupt request). When using any pin from KI0 to
KI3 for the key input interrupt, do not use all four pins AN4 to AN7 as analog input pins. While input to any
pin from P10_4 to P10_7 is low, inputs to all other pins of the port are not detected as interrupts.
Key input interrupts can be used as a key-on wake up function for getting the MCU out of wait or stop
mode.
Figure 14.11 shows Block Diagram of Key Input Interrupt.
Pull-up
transistor
PD10_7 bit in the PD10 register
KI3
Pull-up
transistor
KI2
Pull-up
transistor
KI1
Pull-up
transistor
KI0
Figure 14.11 Block Diagram of Key Input Interrupt
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
NMIDF2 to NMIDF0
Digital filter
: Bit in the PM2 register
PU25 bit in the PUR2 register
PD10_7 bit in the PD10 register
PD10_6 bit
in the PD10 register
PD10_5 bit
in the PD10 register
PD10_4 bit
in the PD10 register
PM24
NMI interrupt
PCR7 bit
in the PCR register
14. Interrupts
Key input interrupt request
(IR bit in the KUPIC register)
Page 217 of 800

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