Pmc0 Compare Control Register (Pmc0Cpc) - Renesas M16C/64A Series User Manual

M16C/64A Group

22.2.12 PMC0 Compare Control Register (PMC0CPC)

PMC0 Compare Control Register
b7 b6 b5 b4 b3 b2
CPN2-CPN0 (Compare bit specify bit) (b2-b0)
These bits are enabled when the CPEN bit is 1 (compare enabled).
When the setting value of bits CPN2 to CPN0 is n, bits n to 0 are compared.
e.g.1 Setting value = 0
Bit 0 in the PMC0CPD register and bit 0 in the PMC0DAT0 register are compared.
e.g.2 Setting value = 7
Bits 7 to 0 in the PMC0CPD register and bits 7 to 0 in the PMC0DAT0 register are compared.
CPEN (Compare enable bit) (b4)
When the CPEN bit is 1 (compare enabled), values from registers PMC0CPD and PMC0DAT0 are
compared.
When storing received data, if the compared results match, the CPFLG bit in the PMC0STS register
becomes 1 (compare match).
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
b1 b0
Symbol
PMC0CPC
Bit Symbol
CPN0
CPN1 Compare bit specify bit
CPN2
—
No register bit. If necessary, set to 0. Read as undefined value.
(b3)
CPEN Compare enable bit
—
No register bits. If necessary, set to 0. Read as undefined value.
(b7-b5)
Address
01F6h
Bit Name
When the setting value is n, bits n to
0 are compared.
0: Compare disabled
1: Compare enabled
22. Remote Control Signal Receiver
Reset Value
XXX0 X000b
Function
Page 421 of 800
RW
RW
RW
RW
—
RW
—