M16C/64A Group
8.
Clock Generator
8.1
Introduction
The clock generator generates operating clocks for the CPU and peripheral functions. The following
circuits are incorporated to generate the system clock signals.
•
Main clock oscillator
•
PLL frequency synthesizer
•
125 kHz on-chip oscillator
•
Sub clock oscillator
Table 8.1 lists the specifications of the clock generator, and Figure 8.1 shows the block diagram of system
clock generator.
Table 8.1
Clock Generator Specifications
Item
Application
•
CPU clock source
•
Peripheral function
clock source
Clock
frequency
Connectable
•
Ceramic resonator
oscillators
•
Crystal
Pins connecting
to oscillator
Oscillator
start/stop function
Oscillator status
after reset
Other
generated clock can
Note:
1.
The PLL frequency synthesizer uses the main clock oscillator as a reference clock source. The items
above are based on the main clock oscillator.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
Main Clock
PLL Frequency
Oscillator
Synthesizer
•
CPU clock source
•
Peripheral
function clock
source
f(XIN)
f(PLL)
(see note 1)
-
XIN, XOUT
(see note 1)
-
Enabled
Enabled
Oscillating
Stopped
An externally
(see note 1)
-
be input.
125 kHz on-chip oscillator
•
CPU clock source
•
Peripheral function clock
source
•
CPU and peripheral function
clock sources when the
main clock stops oscillating
•
Watchdog timer count
source when the CPU clock
is stopped
fOCO-S
-
-
Enabled
Oscillating
-
8. Clock Generator
Sub Clock Oscillator
•
CPU clock source
•
Peripheral function
clock source
f(XCIN)
Crystal
XCIN, XCOUT
Enabled
Stopped
An externally
generated clock can
be input.
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