Renesas M16C/64A Series User Manual page 26

32.19 Notes on Multi-master I
32.19.1 Limitation on CPU Clock ................................................................................................. 785
32.19.2 Register Access .............................................................................................................. 785
32.19.3 Low/High-level Input Voltage and Low-level Output Voltage ........................................... 785
32.19.4 Generating Stop Condition .............................................................................................. 786
32.20 Notes on CEC........................................................................................................................... 788
32.20.1 Registers and Bit Operation ............................................................................................ 788
32.20.2 VIH of the CEC pin .......................................................................................................... 788
32.21 Notes on A/D Converter........................................................................................................... 789
32.21.1 Analog Input Voltage ....................................................................................................... 789
32.21.2 Analog Input Pin .............................................................................................................. 789
32.21.3 Pin Configuration ............................................................................................................. 789
32.21.4 Register Access ............................................................................................................. 789
32.21.5 A/D Conversion Start ....................................................................................................... 789
32.21.6 A/D Operation Mode Change .......................................................................................... 789
32.21.7 State When Forcibly Terminated ..................................................................................... 790
32.21.8 A/D Open-Circuit Detection Assist Function .................................................................... 790
32.21.9 Detecting Completion of A/D Conversion ........................................................................ 790
32.21.10 Repeat Mode, Repeat Sweep Mode 0, and Repeat Sweep Mode 1 ............................... 791
32.22 Notes on D/A Converter............................................................................................................ 792
32.22.1 When Not Using the D/A Converter ................................................................................ 792
32.23 Notes on Flash Memory........................................................................................................... 793
32.23.1 OFS1 Address and ID Code Storage Address ................................................................ 793
32.23.2 Reading Data Flash ......................................................................................................... 793
32.23.3 CPU Rewrite Mode .......................................................................................................... 794
32.23.4 User Boot ........................................................................................................................ 796
32.23.5 EW1 Mode ....................................................................................................................... 796
Appendix 1. Package Dimensions.................................................................................... 797
REGISTER INDEX .......................................................................................................... 798
2
C-bus Interface .................................................................................. 785
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