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M16C/64A Group
Timing Requirements
(V
= V
= 5 V, V
CC1
CC2
SS
31.2.3
Timing Requirements (Memory Expansion Mode and Microprocessor
Mode)
Table 31.34
Memory Expansion Mode and Microprocessor Mode
Symbol
t
Data input access time (for setting with no wait)
ac1(RD-DB)
t
Data input access time (for setting with 1 to 3 waits)
ac2(RD-DB)
t
Data input access time (when accessing multiplex bus area)
ac3(RD-DB)
t
Data input setup time
su(DB-RD)
RDY input setup time
t
su(RDY-BCLK)
t
Data input hold time
h(RD-DB)
RDY input hold time
t
h(BCLK-RDY)
Notes:
1.
Calculated according to the BCLK frequency as follows:
9
×
0.5 10
[
--------------------- - 45 ns
–
f
(
)
BCLK
2.
Calculated according to the BCLK frequency as follows:
9
(
) 10
×
n
+
0.5
----------------------------------- - 45 ns
–
f
(
)
BCLK
3.
Calculated according to the BCLK frequency as follows:
9
(
) 10
×
n 0.5
–
----------------------------------- - 45 ns
–
f
(
)
BCLK
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
= -20 ° C to 85 ° C/-40 ° C to 85 ° C unless otherwise specified)
= 0 V, at T
opr
Parameter
]
[
]
n is 1 for 1 wait setting, 2 for 2 waits setting and 3 for 3 waits setting.
[
]
n is 2 for 2 waits setting, and 3 for 3 waits setting.
31. Electrical Characteristics
V
= V
CC1
CC2
Standard
Unit
Min.
Max.
(Note 1)
(Note 2)
(Note 3)
40
80
0
0
Page 721 of 800
= 5 V
ns
ns
ns
ns
ns
ns
ns
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