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M16C/64A Group
30.11 Notes on Flash Memory
30.11.1 OFS1 Address and ID Code Storage Address
The OFS1 address and ID code storage address are part of flash memory. When writing a program to
flash memory, write an appropriate value to those addresses simultaneously.
In the OFS1 address, the MCU state after reset and the function to prevent rewrite in parallel I/O mode
are selected. The OFS1 address is 0FFFFFh. This is the most significant address of block 0 in program
ROM 1 and upper address of reset vector. Also, the ID code storage address is in block 0 and upper
address of the interrupt vector.
The ID code check function cannot be disabled. Even if the protect using the ID code check function is
unnecessary, input the appropriate ID code when using a serial programmer or debugger. Without the
appropriate ID code, the serial programmer or debugger cannot be used.
ex) Set FEh to the OFS1 address
When using an address control instruction and logical addition:
.org 0FFFFCh
RESET:
.lword start | 0FE000000h
When using an address control instruction:
.org 0FFFFCh
RESET:
.addr start
.byte 0FEh
(Program format varies depending on the compiler. Refer to the compiler manual.)
30.11.2 Reading Data Flash
When 2.7 V ≤ VCC1 ≤ 3.0 V and f(BCLK) ≥ 16 MHz, or 3.0 V < VCC1 ≤ 5.5 V and f(BCLK) ≥ 20 MHz,
one wait must be inserted to execute the program on the data flash and read the data. Set the PM17 in
the PM1 register or FMR17 bit in the FMR1 register to insert one wait.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
30. Flash Memory
Page 696 of 800
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