Renesas M16C/64A Series User Manual page 434

M16C/64A Group
PMCi internal
Edge
detection
input signal
PMCi count
source
PMCiHDPMIN
PMCiHDPMAX
i = 0, 1
INFLG, CEFLG: Bits in registers PMC1CON2 and PMC0CON2
REFLG, DRFLG, PTHDFLG, PTD0FLG, PTD1FLG: Bits in registers PMC0STS and PMC1STS
SDFLG, CPFLG, BFULFLG: Bits in the PMC0STS register
CPEN, CPN2 to CPN0: Bits in the PM0CPC register
Figure 22.1 Remote Control Signal Receiver Block Diagram (1/3)
PMC0 pin
Bits PSEL1 to PSEL0 in
the PMC1CON2 register
PMC1 pin
i = 0, 1
FIL, SINV: Bits in the PMCiCON0 register
Figure 22.2 Remote Control Signal Receiver Block Diagram (2/3) (PMCi Input)
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
INFLG
Counter
PMCiTIM
Comparator
REFLG
DRFLG
PTHDFLG
PTD0FLG
PTD1FLG
PMCiD0PMIN
SDFLG
PMCiD0PMAX
PMCiD1PMIN
PMCiD1PMAX
PMC0 count source
0
1
01b
0
10b
1
PMC1 count source
CEFLG
PMC0
PMC0RBIT
PMC0DAT0 PMC0DAT1
Comparator
CPEN
CPN2 to CPN0
PMC0CPD
SINV
Synchro-
nization
circuit
Digital
filter
SINV
Synchro-
nization
circuit
Digital
filter
22. Remote Control Signal Receiver
PMC0DAT5
CPFLG
Bits PSEL1 to PSEL0 in
FIL
0
the PMC0CON2 register
01b
1
00b
FIL
0
PMC1 internal input signal
1
BFULFLG
PMC0 internal
input signal
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