Renesas M16C/64A Series User Manual page 515

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M16C/64A Group
23.3.2.1
Bit Rate
In UART mode, the frequency set by the UiBRG register (i = 0 to 2, 5 to 7) divided by 16 becomes a bit
rate.
The setting value (n) of the UiBRG register is calculated by the following formula:
n
---------------------------------------------- - 1
=
bitrate bps
fj = f1SIO, f2SIO, f8SIO, f32SIO
n = 00h to FFh
Table 23.13 lists Example Bit Rates and Settings.
Table 23.13
Example of Bit Rates and Settings
Bit Rate
Count Source
(bps)
1200
2400
4800
9600
14400
19200
28800
31250
38400
51200
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
fj
(
) 16
×
Peripheral Function Clock f1: 16 MHz
Set Value of
of UiBRG
UiBRG: n
f8SIO
103 (67h)
f8SIO
51 (33h)
f8SIO
25 (19h)
f1SIO
103 (67h)
f1SIO
68 (44h)
f1SIO
51 (33h)
f1SIO
34 (22h)
f1SIO
31 (1Fh)
f1SIO
25 (19h)
f1SIO
19 (13h)
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
Peripheral Function Clock f1: 24 MHz
Bit Rate (bps)
Set value of
UiBRG: n
1202
2404
4808
9615
14493
19231
28571
31250
38462
50000
Bit Rate (bps)
155 (9Bh)
1202
77 (4Dh)
2404
38 (26h)
4808
155 (9Bh)
9615
103 (67h)
14423
77 (4Dh)
19231
51 (33h)
28846
47 (2Fh)
31250
38 (26h)
38462
28 (1Ch)
51724
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