Three-Phase Pwm Control Register 1 (Invc1) - Renesas M16C/64A Series User Manual

M16C/64A Group
19.2.4

Three-Phase PWM Control Register 1 (INVC1)

Three-Phase PWM Control Register 1
b7 b6 b5 b4 b3 b2 b1
0
Set the PRC1 bit in the PRCR register to 1 (write enabled) before rewriting this register.
Rewrite the INVC1 register while timers A1, A2, A4, and B2 are stopped.
INV11 (Timer A1, A2, and A4 start trigger select bit) (b1)
The following table lists items influenced by the INV11 bit.
Table 19.6 INV11 Bit
Item
Mode
Registers TA11, TA21
and TA41
Bits INV00 to INV01 in
the INVC0 register
INV13 bit
When the INV06 bit is 1 (sawtooth wave modulation mode), set the INV11 bit to 0 (three-phase mode
0). Also, when the INV11 bit is 0, set the PWCON bit in the TB2SC register to 0 (timer B2 is reloaded
when timer B2 underflows).
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
b0 Symbol
INVC1
Bit Symbol Bit Name
Timer A1, A2 and A4 start
INV10
trigger select bit
Timer A1-1, A2-1 and A4-1
INV11
control bit
Dead time timer count
INV12
source select bit
Carrier wave rise/fall detect
INV13
flag
INV14 Active level control bit
INV15 Dead time disable bit
Dead time timer trigger
INV16
select bit
—
Reserved bit
(b7)
INV11 = 0
Three-phase mode 0
Not used
Disabled
The ICTB2 counter decrements
whenever timer B2 underflows.
Disabled
19. Three-Phase Motor Control Timer Function
Address
0309h
Function
0 : Timer B2 underflow
1 : Timer B2 underflow and write to the TB2
register when timer B2 stops
0 : Three-phase mode 0
1 : Three-phase mode 1
0 : f1TIMAB or f2TIMAB
1 : f1TIMAB divided by 2 or
f2TIMAB divided by 2
0 : Timer A1 reload control signal is 0
1 : Timer A1 reload control signal is 1
0 : Active low
1 : Active high
0 : Dead time enabled
1 : Dead time disabled
0 : Falling edge of one-shot pulse of timer
(A4, A1, and A2)
1 : Rising edge of the three-phase output
shift register (U-, V-, W-phase) output
Set to 0
Three-phase mode 1
Used
Enabled
Enabled when INV11 is 1 and INV06 is 0
Reset Value
00h
RW
RW
RW
RW
RO
RW
RW
RW
RW
INV11 = 1
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