Renesas M16C/64A Series User Manual page 848

REVISION HISTORY
Rev. Date
Page
2.00 Feb 07, 2011
683
684
684
686
687
690
690
691, 693
693
694
694
695
696
696
697
697
698
Electrical Characteristics
699
700
704
707
707
711
713
719, 737 Table 31.33 and Table 31.53 Multi-master I
720
720 to
727, 738
to 745
721, 739 Figure 31.13 and Figure 31.26 Timing Diagram:
M16C/64A Group Hardware Manual
Figure 30.13 Read Lock Bit Status Command:
• Changed "FMR16 = 0?" to "Read the FMR16 bit".
• Changed "Block is locked" and "Block is not locked" to "Read lock bit status completed".
30.8.5.8 Block Blank Check Command: Added the explanation below Figure 30.14.
Figure 30.14 Block Blank Check Command:
• Changed "FMR07 = 0?" to "FMR06 = 1 FMR07 = 1?" and "Read the FMR07 bit".
• Changed "Blank" and "Not blank" to "Block blank check completed".
Table 30.18 Errors and FMR0 Register States:
• Changed the Error Occurrence Conditions column in the Command sequence error row.
• Changed note 1.
30.8.6.2 Handling Procedure for Errors: Changed the handling of an erase error.
30.9.2 Forced Erase Function:
Added "the ROMCR bit in the OFS1 address is 1 (ROMCP1 bit enabled)" to the first paragraph.
30.9.3 Standard Serial I/O Mode Disable Function:
Added "the ROMCR bit in the OFS1 address is 1 (ROMCP1 bit enabled)" to the second paragraph.
Table 30.21 and Table 30.23 Pin Functions (Flash Memory Standard Serial I/O Mode 1, 2):
Added the description of the VREF pin.
30.9.5 Standard Serial I/O Mode 2: Added "The main clock is used." to line 2.
Figure 30.18 Circuit Application in Standard Serial I/O Mode 2: Moved P6_5/CLK1 to a lower position.
30.10.1 ROM Code Protect Function: Added the description for the ROMCR bit.
30.11.1 OFS1 Address and ID Code Storage Address: Added.
30.11.3.2 CPU Rewrite Mode Select: Added the description for the FMR60 bit.
30.11.3.7 DMA transfer: Added the description for EW0 mode.
30.11.3.10 Software Command:
• Changed (b).
• Added "or same command more than once" to (c).
• Added (e).
30.11.3.14 Suspending the Auto-Erase and Auto-Program Operations:
Added the details on reset to the first bullet.
30.11.4.1 User Boot Mode Program:
• Unified "30.11.4.1 Location of User Boot Mode Program" and "30.11.4.2 Entering User Boot
Mode After Standard Serial I/O Mode in the previous version.
• Added the second to seventh bullets.
Table 31.1 Absolute Maximum Ratings:
Added a row for the data area value to T
Table 31.2 Recommended Operating Conditions (1/3):
Added rows for the CEC value to V
Table 31.9 Flash Memory (Program ROM 1, 2) Electrical Characteristics:
Added a condition to the Read voltage row.
Table 31.14 Power-On Reset Circuit:
• Added the t row.
w(por)
• Added the last line in note 1.
Figure 31.3 Power-On Reset Circuit Electrical Characteristics: Deleted note 2.
Table 31.18 Electrical Characteristics (2): Added "ZP, IDU, IDV, IDW" to the V
Table 31.20 Electrical Characteristics (4): Added new part numbers above the table.
Table 31.34 Memory Expansion Mode and Microprocessor Mode:
Changed RDY input setup time from 30.
Table 31.34 to Table 31.37 and Table 31.54 to Table 31.57 Memory Expansion Mode and
Microprocessor Mode:
Deleted the following:
• HOLD input setup time
• HOLD input hold time
• HLDA output delay time
Deleted lower figure (Common to wait state and no wait state settings).
C - 15
Description
Summary
(Flash program erase).
opr
, V , V , and V .
CC1 CC2 IH IL
2
C-bus: Added.
-V row.
T+ T-