Renesas M16C/64A Series User Manual page 688

M16C/64A Group
29.3 Operations
29.3.1 Basic Operation
The CRC (Cyclic Redundancy Check) calculator detects errors in data blocks. The MCU uses two
generator polynomials to generate CRC: CRC-CCITT (X
+ 1).
The CRC code is 16-bit code generated for a given length of a data block in 8-bit units. After setting the
default value in the CRCD register, the CRC code is stored in the CRCD register every time 1-byte of
data is written to the CRCIN register. CRC code generation for 1-byte data is completed in two CPU
clock cycles.
29.3.2 CRC Snoop
The CRC snoop monitors reads from and writes to a certain SFR address and performs CRC
calculation on the data read from and written to the aforementioned SFR address automatically.
Because the CRC snoop recognizes writes to and reads from a certain SFR address as a trigger to
automatically perform CRC calculation, there is no need to write data to the CRCIN register. All SFR
addresses from 0020h to 03FFh are subject to the CRC snoop. The CRC snoop is useful in monitoring
writes to the UART transmit buffer, and reads from the UART receive buffer.
To use this function, write a target SFR address to bits CRCSAR9 to CRCSAR0 in the CRCSAR
register. Then, set the CRCSW bit in the CRCSAR register to 1 to enable snooping on writes to the
target, or set the CRCSR bit in the CRCSAR register to 1 to enable snooping on reads from the target.
When setting the CRCSW bit to 1 and writing data to a target SFR address by CPU or DMA, the CRC
calculator stores the data in the CRCIN register and performs CRC calculation. Similarly, when setting
the CRCSR bit to 1 and reading data in a target SFR address by CPU or DMA, the CRC calculator
stores the data in the CRCIN register and performs CRC calculation.
CRC calculation is performed 1-byte at a time. When the target SFR address is accessed in words (16
bits), CRC code is generated on the lower byte (1 byte) of data.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
16 12 5
+ X + X + 1) and CRC-16 (X
29. CRC Calculator
16 15 2
+ X + X
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