Uarti Receive Buffer Register (Uirb) (I = 0 To 2, 5 To 7) - Renesas M16C/64A Series User Manual

Table of Contents

Advertisement

M16C/64A Group
23.2.7

UARTi Receive Buffer Register (UiRB) (i = 0 to 2, 5 to 7)

UARTi Receive Buffer Register (i = 0 to 2, 5 to 7)
(b15)
(b8)
b7
b0
b7
When bits SMD2 to SMD0 in the UiMR register are 100b, 101b, or 110b, read this register in 16-bit
units, or in 8-bit units from upper byte to lower byte.
Bits FER and PER in the upper byte become 0 when the lower byte of the UiRB register is read.
If an overrun error occurs, the receive data of the UiRB register is undefined.
ABT (Arbitration lost detect flag) (b11)
The ABT bit is set to 0 by a program. (It remains unchanged even if 1 is written.)
OER (Overrun error flag) (b12)
Conditions to become 0:
Bits SMD2 to SMD0 in the UiMR register are 000b (serial interface disabled).
The RE bit in the UiC1 register is 0 (reception disabled).
Condition to become 1:
The RI bit in the UiC1 register is 1 (data present in UiRB register), and the last bit of the next data
is received.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
Symbol
b0
U0RB
U1RB
U2RB
U5RB
U6RB
U7RB
Bit Symbol
Bit Name
(b7-b0)
(b8)
No register bits. If necessary, set to 0. The read value is undefined.
(b10-b9)
ABT
Arbitration lost detect flag
OER
Overrun error flag
FER
Framing error flag
PER
Parity error flag
SUM
Error sum flag
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
Address
024Fh to 024Eh
025Fh to 025Eh
026Fh to 026Eh
028Fh to 028Eh
029Fh to 029Eh
02AFh to 02AEh
Function
Receive data (D7 to D0)
Receive data (D8)
0 : Not detected
1 : Detected
0 : No overrun error
1 : Overrun error found
0 : No framing error
1 : Framing error found
0 : No parity error
1 : Parity error found
0 : No error
1 : Error found
Reset Value
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
RW
RO
RO
RW
RO
RO
RO
RO
Page 461 of 800

Advertisement

Table of Contents
loading

Table of Contents