Processor Mode Register 2 (Pm2) - Renesas M16C/64A Series User Manual

M16C/64A Group
14.2.1

Processor Mode Register 2 (PM2)

Processor Mode Register 2
b7 b6 b5 b4 b3 b2 b1
0
Set the PRC1 bit in the PRCR register to 1 (write enabled) before rewriting this register.
PM24 (NMI interrupt enable bit) (b4)
Once this bit is set to 1, it cannot be set to 0 by a program (writing 0 has no effect).
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
b0 Symbol
1
PM2
Bit Symbol Bit Name
—
Reserved bit
(b0)
PM21 System clock protection bit
—
No register bit. If necessary, set to 0. The read value is undefined.
(b2)
—
Reserved bit
(b3)
PM24 NMI interrupt enable bit
PM25 Peripheral clock fC provide bit
—
No register bits. If necessary, set to 0. The read value is undefined.
(b7-b6)
Address
001Eh
Function
Set to 1.
0 : Clock is protected by PRCR register
1 : Clock change disabled
Set to 0
0 : NMI interrupt disabled
1 : NMI interrupt enabled
0 : Not provided
1 : Provided
14. Interrupts
Reset Value
XX00 0X01b
RW
RW
RW
—
RW
RW
RW
—
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