Renesas M16C/64A Series User Manual page 823

Table of Contents

Advertisement

M16C/64A Group
32.21.7 State When Forcibly Terminated
If A/D conversion in progress is halted by setting the ADST bit in the ADCON0 register to 0 (A/D
conversion stopped), the conversion result is undefined. In addition, the unconverted ADi register
(i = 0 to 7) may also become undefined. Do not use any value in ADi registers when setting the ADST
bit to 0 by a program during A/D conversion.
32.21.8 A/D Open-Circuit Detection Assist Function
The conversion result in open-circuit depends on the external circuit. Use this function only after careful
evaluation of the system. Do not use this function when VCC1 > VCC2.
When A/D conversion starts after changing the AINRST register, follow these steps:
(1) Change bits AINRST1 to AINRST0 in the AINRST register.
(2) Wait for one cycle of φ AD.
(3) Set the ADST bit in the ADCON0 register to 1 (A/D conversion started).
32.21.9 Detecting Completion of A/D Conversion
In one-shot mode and single sweep mode, use the IR bit in the ADIC register to detect completion of
A/D conversion. When not using an interrupt, set the IR bit to 0 by a program after detection.
When 1 is written to the ADST bit in the ADCON0 register, the ADST bit becomes 1 (A/D conversion
start) after start processing time elapses (see Table 27.7 "Cycles of A/D Conversion Item"). Therefore
when reading the ADST bit immediately after writing 1, 0 (A/D conversion stop) may be read.
Write 1 to the ADST bit by a program.
ADST bit in the
ADCON0 register
I
R bit in the
ADIC register
Figure 32.17 ADST Bit Operation
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
Start
A/D conversion
processing time
32. Usage Notes
Set to 0 by a program or
acceptance of an interrupt request.
Page 790 of 800

Advertisement

Table of Contents
loading

Table of Contents