Renesas M16C/64A Series User Manual page 601

M16C/64A Group
Table 25.14 Conditions to Detect Start/Stop Condition
SCLMM open time
Setup time
Hold time
BB bit
setting/resetting
time
Unit: Number of fVIIC cycles
SSC value: Value of bits SSC4 to SSC0 in the S2D0 register
Table 25.15 Recommended Values of Bits SSC4 to SSC0 in Standard Clock Mode
SSC Value
fVIIC
(recommended)
5 MHz 11110b
11010b
4 MHz
11000b
01100b
2 MHz
01010b
1 MHz 00100b
SSC value: Value of bits SSC4 to SSC0 in the S2D0 register
( ): Number of fVIIC cycles
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
Standard Clock Mode
SSC value + 1 cycle
SSC value
1 cycle
--------------------------- - +
2
SSC value
--------------------------- - cycles
2
SSC value 1 –
2 cycles
------------------------------------ - +
2
Start/Stop Condition Detect Parameter
SCLMM open time
6.2 μ s (31)
6.75 μ s (27)
6.25 μ s (25)
6.5 μ s (13)
5.5 μ s (11)
5.0 μ s (5)
Setup time Hold time
3.2 μ s (16) 3.0 μ s (15)
3.5 μ s (14) 3.25 μ s (13)
3.25 μ s (13) 3.0 μ s (12)
3.5 μ s (7) 3.0 μ s (6)
3.0 μ s (6) 2.5 μ s (5)
3.0 μ s (3) 2.0 μ s (2)
2
25. Multi-master I C-bus Interface
Fast-Mode
4 cycles
2 cycles
2 cycles
3.5 cycles
BB Bit
Setting/Resetting
Time
3.3 μ s (16.5)
3.625 μ s (14.5)
3.375 μ s (13.5)
3.75 μ s (7.5)
3.25 μ s (6.5)
3.5 μ s (3.5)
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