Repeat Transfer Mode - Renesas M16C/64A Series User Manual

M16C/64A Group
16.3.6

Repeat Transfer Mode

In repeat transfer mode, when the DMAi transfer counter underflows, it is reloaded with the value of the
DMAi transfer counter reload register and DMA transfer continues. Figure 16.4 shows an Operation
Example in Repeat Transfer Mode.
Repeat Transfer Mode
Bus CPU
DMAS bit
TCRi register
Undefined
IR bit
DMAE bit
i = 0 to 3
DMAS, DMAE: Bits in the DMiCON register
IR: Bit in the DMiIC register
The above assumes the following:
The TCRi register value is 02h (there are three transfers).
Figure 16.4 Operation Example in Repeat Transfer Mode
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
DMA CPU
When a transfer begins, the DMAS bit becomes 0.
02h 01h
Reload
Set to 1 by a program.
DMA CPU DMA
Underflow
00h
Set to 0 by an interrupt request acknowledgement
CPU DMA CPU
02h 01h
or by a program.
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16. DMAC