Operation When Cm27 Bit Is 1 (Oscillator Stop/Restart Detect Interrupt) - Renesas M16C/64A Series User Manual

M16C/64A Group
8.7.2

Operation When CM27 Bit is 1 (Oscillator Stop/Restart Detect Interrupt)

When the CM20 bit is 1 (oscillator stop/restart detect function enabled), the system is placed in the
state shown in Table 8.7 if the main clock detects oscillator stop or restart.
The CM21 bit becomes 1 in high-speed, medium-speed, or low-speed mode. Thus, high-speed and
medium-speed mode become 125 kHz on-chip oscillator mode. Because the CM07 bit does not
change, low-speed mode remains in low-speed mode, but fOCO-S becomes the clock source for the
peripheral functions.
Since the CM21 bit does not change in PLL operating mode, change the mode to 125 kHz on-chip
oscillator mode in the interrupt routine.
Table 8.7 State after Oscillator Stop/Restart Detect When CM27 Bit is 1
Condition
High-speed mode
Medium-speed
mode
Low-speed mode
125 kHz on-chip
oscillator mode
Main clock
oscillator stop
detected
PLL operating mode
Main clock
oscillator
-
restart
detected
CM14 bit: Bit in the CM1 register
Bits CM21, CM22, CM23: Bits in the CM2 register
Note:
1. fC is used as the CPU clock in low-speed mode.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
•
Oscillator stop/restart detect interrupt is generated
•
CM14 bit is 0 (125 kHz on-chip oscillator on)
•
CM21 bit is 1 (fOCO-S is used as the clock source for the CPU and
peripheral function clocks)
•
CM22 bit is 1 (main clock stop detected)
•
CM23 bit is 1 (main clock stopped)
•
Oscillator stop/restart detect interrupt is generated
•
CM14 bit is 0 (125 kHz on-chip oscillator on)
•
CM21 bit remains unchanged
•
CM22 bit is 1 (main clock stop detected)
•
CM23 bit is 1 (main clock stopped)
•
Oscillator stop/restart detect interrupt is generated
•
CM14 bit is 0 (125 kHz on-chip oscillator on)
•
CM21 bit does not change
•
CM22 bit is 1 (main clock stop detected)
•
CM23 bit is 0 (main clock oscillating)
After Detection
(1)
8. Clock Generator
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