Uarti Transmit/Receive Control Register 1 (Uic1) (I = 0 To 2, 5 To 7) - Renesas M16C/64A Series User Manual

M16C/64A Group
23.2.6

UARTi Transmit/Receive Control Register 1 (UiC1) (i = 0 to 2, 5 to 7)

UARTi Transmit/Receive Control Register 1 (i = 0, 1)
b7 b6 b5 b4 b3 b2 b1
UARTi Transmit/Receive Control Register 1 (i = 2, 5 to 7)
b7 b6 b5 b4 b3 b2 b1
Bits UiIRS and UiRRM of UART0 and UART1 are bits in the UCON register.
UiLCH (Data logic select bit) (b6)
The UiLCH bit is enabled when bits SMD2 to SMD0 in the UiMR register are 001b (clock synchronous
serial I/O mode), 100b (UART mode, 7-bit character), or 101b (UART mode, 8-bit character). Set this bit
to 0 when bits SMD2 to SMD0 are set to 010b (I
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
b0
Symbol
U0C1, U1C1
Bit Symbol Bit Name
TE Transmit enable bit
TI Transmit buffer empty flag
RE Receive enable bit
RI Receive complete flag
—
No register bits. If necessary, set to 0. Read as undefined value
(b5-b4)
UiLCH
Data logic select bit
UiERE
Error signal output enable bit
b0
Symbol
U2C1
U5C1, U6C1, U7C1,
Bit symbol Bit Name
TE Transmit enable bit
TI Transmit buffer empty flag
RE Receive enable bit
RI Receive complete flag
UARTi transmit interrupt
UilRS
source select bit
UARTi continuous receive
UiRRM
mode enable bit
UiLCH Data logic select bit
UiERE Error signal output enable bit
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
Address
024Dh, 025Dh
Function
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in UiTB register
1 : No data present in UiTB register
0 : Reception disabled
1 : Reception enabled
0 : No data present in UiRB register
1 : Data present in UiRB register
0 : No reverse
1 : Reverse
0 : Output disabled
1 : Output enabled
Address
026Dh
028Dh, 029Dh, 02ADh
Function
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in UiTB register
1 : No data present in UiTB register
0 : Reception disabled
1 : Reception enabled
0 : No data present in UiRB register
1 : Data present in UiRB register
0 : UiTB register empty (TI = 1)
1 : Transmission completed (TXEPT = 1)
0 : Continuous receive mode disabled
1 : Continuous receive mode enabled
0 : Not inverted
1 : Inverted
0 : Output disabled
1 : Output enabled
2
C mode) or 110b (UART mode, 9-bit character).
After Reset
00XX 0010b
RW
RW
RO
RW
RO
—
RW
RW
Reset Value
0000 0010b
0000 0010b
RW
RW
RO
RW
RO
RW
RW
RW
RW
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