Event Counter Mode - Renesas M16C/64A Series User Manual

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M16C/64A Group
18.3.3

Event Counter Mode

In event counter mode, the timer counts pulses from an external device, or overflows and underflows of
other timers. Table 18.7 lists Event Counter Mode Specifications, Table 18.8 lists Registers and
Settings in Event Counter Mode, and Figure 18.5 shows an Operation Example in Event Counter
Mode.
Table 18.7
Event Counter Mode Specifications
Item
Count sources
Count operations
Number of counts
Count start condition
Count stop condition
Interrupt request
generation timing
TBiIN pin function
Read from timer
Write to timer
i = 0 to 5
j = i - 1, except j = 2 if i = 0; j = 5 if i = 3
TBiS: Bit in the TABSR or TBSR register
Table 18.8
Registers and Settings in Event Counter Mode
Register
PCLKR
CPSRF
TBi1
PPWFS1 to
PPWFS2
TBCS0 to TBCS3
TABSR
TBSR
TBi
TBiMR
i = 0 to 5
Note:
1.
This table does not describe a procedure.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
External signals input to TBiIN pin (active edge can be selected by a
program: rising edge, falling edge, or both rising and falling edges)
Timer Bj overflow or underflow
Decrement
When the timer underflows, it reloads the reload register value and
continues counting.
1
----------------- -
(
)
n
+
1
n: setting value of the TBi register
Set the TBiS bit to 1 (start counting).
Set the TBiS bit to 0 (stop counting).
Timer underflow
Count source input
Count value can be read by reading the TBi register.
When not counting
The value written to the TBi register is written to both the reload register and
the counter.
When counting
The value written to the TBi register is written to only reload register
(transferred to counter when reloaded next).
Bit
PCLK0
CPSR
15 to 0
PPWFS12 to PPWFS10
PPWFS22 to PPWFS20
7 to 0
TBiS
15 to 0
7 to 0
Specification
0000h to FFFFh
(1)
Function and Setting
- (setting unnecessary)
Write 1 to reset the clock prescaler.
- (setting unnecessary)
Set to 0.
- (setting unnecessary)
Set to 1 when starting counting.
Set to 0 when stopping counting.
Set the count value.
Refer to the TBiMR register below.
18. Timer B
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