Renesas M16C/64A Series User Manual page 660

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M16C/64A Group
Table 27.7 lists Cycles of A/D Conversion Item. A/D conversion time is described below.
Start processing time depends on which φ AD is selected.
A/D conversion starts after the start processing time elapses by setting the ADST bit in the ADCON0
register to 1 (A/D conversion start). When reading the ADST bit before starting A/D conversion, 0 (A/D
conversion stop) is read.
When selecting multiple pins, or in a mode which performs A/D conversion multiple times, inter-execution
processing time is inserted between A/D conversions.
In one-shot mode and single sweep mode, the ADST bit becomes 0 at the end processing time and the
last A/D conversion result is stored in the ADi register.
One-shot mode:
Start processing time + A/D conversion execution time + end processing time
Two pins are selected in single sweep mode:
Start processing time + (A/D conversion execution time + inter-execution processing time + A/D
conversion execution time) + end processing time
Table 27.7
Cycles of A/D Conversion Item
Start processing time
A/D conversion execution
time
Inter-execution processing time
End processing time
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
A/D Conversion Item
φ AD = fAD
φ AD = fAD divided by 2
φ AD = fAD divided by 3
φ AD = fAD divided by 4
φ AD = fAD divided by 6
φ AD = fAD divided by 12
Open-circuit detection disabled
Open-circuit detection enabled
27. A/D Converter
Number of Cycles
1 to 2 cycles of fAD
2 to 3 cycles of fAD
3 to 4 cycles of fAD
3 to 4 cycles of fAD
4 to 5 cycles of fAD
7 to 8 cycles of fAD
40 cycles of φ AD
42 cycles of φ AD
1 cycle of φ AD
2 to 3 cycles of fAD
Page 627 of 800

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