Renesas M16C/64A Series User Manual page 577

M16C/64A Group
25.2.7 I2C0 Control Register 1 (S3D0)
I2C0 Control Register 1
b7 b6 b5 b4 b3 b2 b1
Do not use the bit managing instruction (read-modify-write instruction) to access the S3D0 register. Use
the MOV instruction to write to the S3D0 register.
SIM (Stop condition detect interrupt enable bit) (b0)
When the SIM bit is 1 (I
detected, the SCPIN bit in the S4D0 register becomes 1 (stop condition detect interrupt requested) and
the IR bit in the IICIC register becomes 1 (interrupt requested).
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
Symbol
b0
S3D0
Bit Symbol Bit Name
Stop condition detect interrupt
SIM
enable bit
Data receive interrupt enable
WIT
bit
SDAMM/port function select
PED
bit
PEC SCLMM/port function select bit
Internal SDA output monitor
SDAM
bit
SCLM Internal SCL output monitor bit
2
ICK0 I C-bus system clock select bit
(enabled when bits ICK4 to
ICK2 in the S4D0 register are
ICK1
000b)
2
C-bus interrupt by stop condition detection enabled) and a stop condition is
25. Multi-master I
Address
02B6h
Function
2
0: I C-bus interrupt by stop condition
detection is disabled
2
1: I C-bus interrupt by stop condition
detection is enabled
When write,
2
0: I C-bus interrupt at 8th clock is disabled
2
1: I C-bus interrupt is enabled at 8th clock
When read, internal WAIT bit monitor
2
0: I C-bus interrupt by falling edge of ACK clock
2
1: I C-bus interrupt at 8th clock
0: SDAMM I/O pin
1: Port output pin
0: SCLMM I/O pin
1: Port output pin
0: Logic 0 output
1: Logic 1 output
0: Logic 0 output
1: Logic 1 output
b7 b6
0 0: fIIC divided by 2
0 1: fIIC divided by 4
1 0: fIIC divided by 8
1 1: Do not set this value.
2
C-bus Interface
After Reset
0011 0000b
RW
RW
RW
RW
RW
RO
RO
RW
RW
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