Table of Contents
Advertisement
14.2.3
Interrupt Control Register 2
(INT7IC, INT6IC, INT3IC, S4IC/INT5IC, S3IC/INT4IC, INT0IC to INT2IC) ..................... 196
14.2.4
Interrupt Source Select Register 3 (IFSR3A) .................................................................. 197
14.2.5
Interrupt Source Select Register 2 (IFSR2A) .................................................................. 198
14.2.6
Interrupt Source Select Register (IFSR) .......................................................................... 199
14.2.7
Address Match Interrupt Enable Register (AIER) ............................................................ 200
14.2.8
Address Match Interrupt Enable Register 2 (AIER2) ....................................................... 200
14.2.9
Address Match Interrupt Register i (RMADi) (i = 0 to 3) .................................................. 201
14.2.10
Port Control Register (PCR) ............................................................................................ 202
NMI / SD Digital Filter Register (NMIDF) ........................................................................... 203
14.2.11
14.3
Types of Interrupts .................................................................................................................... 204
14.4
Software Interrupts ................................................................................................................... 205
14.4.1
Undefined Instruction Interrupt ........................................................................................ 205
14.4.2
Overflow Interrupt ............................................................................................................ 205
14.4.3
BRK Interrupt ................................................................................................................... 205
14.4.4
INT Instruction Interrupt ................................................................................................... 205
14.5
Hardware Interrupts .................................................................................................................. 206
14.5.1
Special Interrupts ............................................................................................................. 206
14.5.2
Peripheral Function Interrupts ......................................................................................... 206
14.6
Interrupts and Interrupt Vectors ................................................................................................ 207
14.6.1
Fixed Vector Tables ......................................................................................................... 207
14.6.2
Relocatable Vector Tables ............................................................................................... 208
14.7
Interrupt Control........................................................................................................................ 210
14.7.1
Maskable Interrupt Control .............................................................................................. 210
14.7.2
Interrupt Sequence ...........................................................................................................211
14.7.3
Interrupt Response Time ................................................................................................. 212
14.7.4
Variation of IPL When Interrupt Request is Accepted ..................................................... 212
14.7.5
Saving Registers ............................................................................................................. 213
14.7.6
Returning from an Interrupt Routine ................................................................................ 214
14.7.7
Interrupt Priority ............................................................................................................... 214
14.7.8
Interrupt Priority Level Select Circuit ............................................................................... 214
14.7.9
Multiple Interrupts ............................................................................................................ 216
INT Interrupt.............................................................................................................................. 216
14.8
NMI Interrupt............................................................................................................................. 217
14.9
14.10
Key Input Interrupt .................................................................................................................... 217
14.11
Address Match Interrupt ........................................................................................................... 218
14.12
Non-Maskable Interrupt Source Discrimination ........................................................................ 219
14.13
Notes on Interrupts ................................................................................................................... 220
14.13.1
Reading Address 00000h ................................................................................................ 220
14.13.2
SP Setting ....................................................................................................................... 220
NMI Interrupt ................................................................................................................... 220
14.13.3
A - 6
Advertisement
Table of Contents
