Renesas M16C/64A Series User Manual page 701

M16C/64A Group
30.4.1 Optional Function Select Address 1 (OFS1)
Optional Function Select Address 1
b7 b6 b5 b4 b3
1
ROMCR (ROM code protect disable bit) (b2)
ROMCP1 (ROM code protect bit) (b3)
These bits are used to disable the flash memory from being read or rewritten in parallel I/O mode.
Table 30.5 ROM Code Protect
Bit Setting
ROMCR bit
0
0
1
1
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
b2 b1 b0 Symbol
1
OFS1
Bit Symbol
WDTON Watchdog timer start select bit
—
Reserved bit
(b1)
ROMCR ROM code protect cancel bit
ROMCP1 ROM code protect bit
—
Reserved bit
(b4)
VDSEL1 Vdet0 select bit 1
LVDAS Voltage detector 0 start bit
After-reset count source
CSPROINI
protection mode select bit
ROMCP1 bit
0
1
0
1
Address
FFFFFh
Bit Name
0 : Watchdog timer starts automatically
after reset
1 : Watchdog timer is stopped after reset
Set to 1.
0 : ROM code protection cancelled
1 : ROMCP1 bit enabled
0 : ROM code protection enabled
1 : ROM code protection disabled
Set to 1.
0 : Vdet0_2
1 : Vdet0_0
0 : Voltage monitor 0 reset enabled
after hardware reset
1 : Voltage monitor 0 reset disabled
after hardware reset
0 : Count source protection mode
enabled after reset
1 : Count source protection mode
disabled after reset
ROM Code Protect
Disabled
Enabled
Disabled
30. Flash Memory
Function
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