Renesas M16C/64A Series User Manual page 599

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M16C/64A Group
When arbitration lost is detected:
The AL bit in the S10 register becomes 1 (arbitration lost detected)
Internal SDA output becomes high. (SDAMM released)
2
The I
C interface enters the slave receive mode
The TRX bit in the S10 register is 0 (receive mode).
The MST bit in the S10 register is 0 (slave mode).
In order to set the AL bit to 0 again after arbitration lost is detected, set a value to the S00 register.
When arbitration lost is detected during slave address transmission, the I
enters slave receive mode and receives the slave address sent from another master. When the ALS bit
in the S1D0 register is 0 (addressing format), the slave address comparison result is determined by
reading bits ADR0 and AAS in the S10 register.
When arbitration lost is detected during data transmission, the I
receive mode.
Also, when arbitration lost is detected, the TRX bit becomes 0 (receive mode) even when the bit after
the slave address is 1 (read). Therefore, read the S00 register after arbitration lost is detected. When bit
0 in the S00 register is 1, write 4Fh (slave transmit mode) to the S10 register and execute slave
transmission.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
25. Multi-master I
2
C interface automatically
2
C interface automatically enters slave
2
C-bus Interface
Page 566 of 800

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