M16C/64A Group
7.2.7
Voltage Monitor 2 Control Register (VW2C)
Voltage Monitor 2 Control Register
b7 b6 b5 b4
b3
b2
b1
Set the PRC3 bit in the PRCR register to 1 (write enabled) before rewriting the VW2C register.
Bits VW2C2 and VW2C3 do not change at voltage monitor 1 reset, voltage monitor 2 reset, oscillator
stop detect reset, watchdog timer reset, or software reset.
When rewriting the VW2C register (excluding the VW2C3 bit), the VW2C2 bit may become 1. Set the
VW2C2 bit to 0 after rewriting the VW2C register.
VW2C0 (Voltage monitor 2 interrupt/reset enable bit) (b0)
The VW2C0 bit is enabled when the VW12E bit in the VWCE register is 1 (voltage monitors 1 and 2
enabled) and the VC27 bit in the VCR2 register is 1 (voltage detector 2 enabled). Set the VW2C0 bit to
0 (disabled) when the VC27 bit is 0 (voltage detector 2 disabled).
VW2C1 (Voltage monitor 2 digital filter disable mode select bit) (b1)
After using the voltage monitor 2 interrupt to exit stop mode, to use it again to exit stop mode, set the
VW2C1 bit to 0 first and then to 1.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
b0
Symbol
VW2C
Bit Symbol
Bit Name
Voltage monitor 2 interrupt/
VW2C0
reset enable bit
Voltage monitor 2 digital filter
VW2C1
disable mode select bit
Voltage change detection
VW2C2
flag
Watchdog timer detection
VW2C3
flag
VW2F0
Sampling clock select bit
VW2F1
Voltage monitor 2 mode
VW2C6
select bit
Voltage monitor 2 interrupt/
VW2C7
reset generation condition
select bit
Address
002Ch
0 : Disabled
1 : Enabled
0 : Digital filter enabled
1 : Digital filter disabled
0 : Not detected
1 : Vdet2 passage detected
0 : Not detected
1 : Watchdog timer underflow detected
b5 b4
0
0 : fOCO-S divided by 1
0
1 : fOCO-S divided by 2
1
0 : fOCO-S divided by 4
1
1 : fOCO-S divided by 8
0 : Voltage monitor 2 interrupt at Vdet2 passage
1 : Voltage monitor 2 reset at Vdet2 passage
0: When VCC1 reaches or goes
above Vdet2
1: When VCC1 reaches or goes
below Vdet2
7. Voltage Detector
Reset Value
1000 0X10b
Function
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