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M16C/64A Group
Switching Characteristics
(V
= V CC2 = 5 V, V
CC1
31.2.4.3
In 2 or 3 Waits Setting, and When Accessing External Area and Using
Multiplexed Bus
Table 31.37
Memory Expansion Mode and Microprocessor Mode (in 2 or 3 Waits Setting, and When
Accessing External Area and Using Multiplexed Bus)
Symbol
t
Address output delay time
d(BCLK-AD)
t
Address output hold time (in relation to BCLK)
h(BCLK-AD)
t
Address output hold time (in relation to RD)
h(RD-AD)
t
Address output hold time (in relation to WR)
h(WR-AD)
t
Chip select output delay time
d(BCLK-CS)
t
Chip select output hold time (in relation to BCLK)
h(BCLK-CS)
t
Chip select output hold time (in relation to RD)
h(RD-CS)
t
Chip select output hold time (in relation to WR)
h(WR-CS)
t
RD signal output delay time
d(BCLK-RD)
t
RD signal output hold time
h(BCLK-RD)
t
WR signal output delay time
d(BCLK-WR)
t
WR signal output hold time
h(BCLK-WR)
t
Data output delay time (in relation to BCLK)
d(BCLK-DB)
t
Data output hold time (in relation to BCLK)
h(BCLK-DB)
t
Data output delay time (in relation to WR)
d(DB-WR)
t
Data output hold time (in relation to WR)
h(WR-DB)
t
ALE signal output delay time (in relation to BCLK)
d(BCLK-ALE)
t
ALE signal output hold time (in relation to BCLK)
h(BCLK-ALE)
t
ALE signal output delay time (in relation to Address)
d(AD-ALE)
t
ALE signal output hold time (in relation to Address)
h(AD-ALE)
t
RD signal output delay from the end of address
d(AD-RD)
t
WR signal output delay from the end of address
d(AD-WR)
t
Address output floating start time
dz(RD-AD)
Notes:
1.
Calculated according to the BCLK frequency as follows:
9
×
0.5 10
[
--------------------- - 10 ns
–
f
(
)
BCLK
2.
Calculated according to the BCLK frequency as follows:
9
(
) 10
×
n 0.5
–
----------------------------------- - 40 ns
–
f
(
)
BCLK
3.
Calculated according to the BCLK frequency as follows:
9
×
0.5 10
[
--------------------- - 25 ns
–
f
(
)
BCLK
4.
Calculated according to the BCLK frequency as follows:
9
×
0.5 10
[
--------------------- - 15 ns
–
f
(
)
BCLK
5.
When using multiplex bus, set f
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
= -20 ° C to 85 ° C/-40 ° C to 85 ° C unless otherwise specified)
= 0 V, at T
SS
opr
Parameter
]
[
]
n is 2 for 2-wait setting, 3 for 3-wait setting.
]
]
12.5 MHz or less.
(BCLK)
31. Electrical Characteristics
V
CC1
(5)
Standard
Measuring
Condition
Min.
0
(Note 1)
(Note 1)
0
(Note 1)
(Note 1)
0
See
0
Figure 31.14
0
(Note 2)
(Note 1)
− 4
(Note 3)
(Note 4)
0
0
= V
= 5 V
CC2
Unit
Max.
25
ns
ns
ns
ns
25
ns
ns
ns
ns
25
ns
ns
25
ns
ns
40
ns
ns
ns
ns
15
ns
ns
ns
ns
ns
ns
8
ns
Page 728 of 800
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