Renesas M16C/64A Series User Manual page 193

M16C/64A Group
Memory expansion mode
00000h
00400h
XXXXXh
08000h
0D000h
0D800h
0E000h
10000h
Program ROM 2
14000h
27000h
28000h
40000h
80000h
C0000h
YYYYYh
Program ROM 1
FFFFFh
Notes:
1. See the table below for addresses XXXXXh and YYYYYh.
Capacity
12 KB
20 KB
31 KB
2. When the PM10 bit is 0, this area is used as an external area; when the bit is 1, this area is used as internal
ROM (data flash).
3. When the PRG2C0 bit in the PRG2C register is 1, this area is used as an external area; when the bit is 0,
this area is used as internal ROM (program ROM 2).
4. When the PM10 bit is 0, this area is used as an external area; when the bit is 1, this area is used as a
reserved area.
5. When the PRG2C0 bit in the PRG2C register is 1, this area is used as an external area; when the bit is 0,
this area is used as a reserved area.
6. The CS0 pin outputs a low signal, and pins CS3 to CS1 output a bank number.
Memory Mapping and CS Areas in 4-MB Mode (PM13 = 1)
Figure 12.4
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
SFR
(1)
Internal RAM
Reserved area
SFR
(2)
Data flash
(3)
Reserved area
External area
Reserved area
(1)
Internal RAM
Address XXXXXh
033FFh
053FFh
07FFFh
12. Memory Space Expansion Function
Microprocessor mode
SFR
(1)
Internal RAM
Reserved area
SFR
(4)
Reserved, external area
(5)
Reserved, external area
CS2
Reserved area
CS1
External area
Other than the CS area
CS0
Program ROM 1
Capacity Address YYYYYh
128 KB
256 KB
384 KB
512 KB
(96 KB)
(Note 6)
(256 KB)
E0000h
C0000h
A0000h
80000h
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